This invention relates to electronics, in general, and to methods of manufacturing semiconductor components and semiconductor components thereof, in particular.
In deep-sub-micron semiconductor technologies, minority carrier injection can be a major problem because of its detrimental effects on shifting the threshold voltages for Field Effect Transistors (FETs) and on increasing the occurrence of transistor latch-up. To eliminate this problem, some deep sub-micron semiconductor technologies use a heavily doped substrate underneath a thin, lightly doped epitaxial layer. The heavily doped substrate significantly reduces the minority carrier lifetime and transistor latch-up, while the lightly doped epitaxial layer is used to build the semiconductor devices.
The small thickness of the epitaxial layer, however, introduces a new problem due to the out-diffusion of the dopant from the underlying, heavily doped substrate into the overlying, lightly doped epitaxial layer, which reduces the effective thickness of the epitaxial layer. Consequently, a high voltage portion of an integrated circuit manufactured in the epitaxial layer has poor electrical performance because of its low breakdown voltage resulting from the excessively small effective thickness of the epitaxial layer. The use of a thicker epitaxial layer to solve this problem increases the problems of minority carrier propagation and transistor latch-up and also increases the risk of high levels of leakage current because of the implant-induced defects in the thicker epitaxial layer resulting from the higher energy implants needed to dope the thicker epitaxial layer.
One technique proposed to solve the problem includes growing a thicker epitaxial layer, and then selectively etching the thicker epitaxial layer to reduce its thickness in an area in which the low voltage portion of the integrated circuit is to be located. However, this selective etch process is not manufacturable in most circumstances due to manufacturing yield problems. Another proposed solution includes selective epitaxial growth, but this, too, is not manufacturable in most circumstances due to manufacturing yield problems.
Accordingly, a need exists for a method of manufacturing a semiconductor component that is compatible with deep sub-micron semiconductor technologies, that has reduced transistor latch-up, and that also has reduced minority carrier lifetimes. A need also exists for a semiconductor component having these qualities.